IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, November-December 2004.Interaction Cost: For When Event Counts Just Don't Add Up.on Architecture and Compiler Optimizations (TACO), September 2004 Using Criticality to Attack Performance Bottlenecks.RpStacks: Fast and Accurate Processor Design Space Exploration Using Representative Stall-Event Stacks.IEEE Computer Architecture Letters, vol.Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processor."We improve the dependence graph model based on two key microarchitectural details that have not been taken into account in previous models: dynamic variation of branch misprediction penalty and a modern SQ (store queue) design which combines the SQ and the writeback buffer (WBB).".Journal of Information Processing Volume 25 (2017).Dependence Graph Model for Accurate Critical Path Analysis on Out-of-Order Processors.Overview of GDP Performance Accounting.High-Performance Computer Architecture (HPCA) 2018.GDP: Using Dataflow Properties to Accurately Estimate Interference-Free Performance at Runtime.Franca and Sandip Kundu, Concurrency Analysis in Dynamic Dataflow Graphs IEEE Transactions on Emerging Topics in Computing, 1–1 (2018).Concurrency Analysis in Dynamic Dataflow Graphs.A whirlwind introduction to dataflow graphs.
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